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PD - 95150
Advanced Process Technology l Surface Mount (IRL3103S) l Low-profile through-hole (IRL3103L) l 175C Operating Temperature l Fast Switching l Fully Avalanche Rated l Lead-Free Description
l
IRL3103SPBF IRL3103LPbF
HEXFET(R) Power MOSFET
D
VDSS = 30V RDS(on) = 12m
G S
Absolute Maximum Ratings
ID @ TC = 25C ID @ TC = 100C IDM PD @TC = 25C VGS IAR EAR dv/dt TJ TSTG
The D2Pak is a surface mount power package capable of accommodating die sizes up to HEX-4. It provides the highest power capability and the lowest possible onresistance in any existing surface mount package. The D2Pak is suitable for high current applications because of its low internal connection resistance and can dissipate up to 2.0W in a typical surface mount application. The through-hole version (IRL3103L) is available for lowprofile applications.
Advanced HEXFET(R) Power MOSFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications.
ID = 64A
D2Pak IRL3103S
TO-262 IRL3103L
Parameter
Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Mounting torque, 6-32 or M3 srew
Max.
64 45 220 94 0.63 16 34 22 5.0 -55 to + 175 300 (1.6mm from case ) 10 lbf*in (1.1N*m)
Units
A W W/C V A mJ V/ns C
Thermal Resistance
Parameter
RJC RJA Junction-to-Case Junction-to-Ambient (PCB mount)**
Typ.
--- ---
Max.
1.6 40
Units
C/W
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1
04/19/04
IRL3103S/LPbF
Electrical Characteristics @ TJ = 25C (unless otherwise specified)
V(BR)DSS
V(BR)DSS/TJ
Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Single Pulse Avalanche Energy
RDS(on) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LD LS Ciss Coss Crss EAS
Min. 30 --- --- --- 1.0 22 --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- ---
Max. Units Conditions --- V VGS = 0V, ID = 250A --- V/C Reference to 25C, ID = 1mA 12 VGS = 10V, ID = 34A m 16 VGS = 4.5V, ID = 28A --- V VDS = VGS, ID = 250A --- S VDS = 25V, ID = 34A 25 VDS = 30V, VGS = 0V A 250 VDS = 24V, VGS = 0V, TJ = 150C 100 VGS = 16V nA -100 VGS = -16V 33 ID = 34A 5.9 nC VDS = 24V 17 VGS = 4.5V, See Fig. 6 and 13 --- VDD = 15V --- ID = 34A --- RG = 1.8 --- VGS = 4.5V, See Fig. 10 Between lead, 4.5 --- 6mm (0.25in.) nH G from package 7.5 --- and center of die contact 1650 --- VGS = 0V 650 --- VDS = 25V 110 --- pF = 1.0MHz, See Fig. 5 1320130 mJ IAS = 34A, L = 0.22mH
Typ. --- 0.028 --- --- --- --- --- --- --- --- --- --- --- 8.9 120 14 9.1
D
S
Source-Drain Ratings and Characteristics
IS
ISM
VSD trr Qrr ton Notes:
Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time
Min. Typ. Max. Units
Conditions D MOSFET symbol 64 --- --- showing the A G integral reverse --- --- 220 S p-n junction diode. --- --- 1.2 V TJ = 25C, IS = 34A, VGS = 0V --- 57 86 ns TJ = 25C, IF = 34A --- 110 170 nC di/dt = 100A/s Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Repetitive rating; pulse width limited by Starting TJ = 25C, L = 220H
TJ 175C
max. junction temperature. (See fig. 11) RG = 25, IAS = 34A, VGS=10V (See Figure 12)
Pulse width 400s; duty cycle 2%. This is a typical value at device destruction and represents
operation outside rated limits.
This is a calculated value limited to TJ = 175C .
**When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to application note #AN-994
ISD 34A, di/dt 120A/s, VDD V(BR)DSS,
2
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IRL3103S/LPbF
1000
I D , Drain-to-Source Current (A)
100
I D , Drain-to-Source Current (A)
VGS 15V 10V 4.5V 3.7V 3.5V 3.3V 3.0V BOTTOM 2.7V TOP
1000
100
VGS 15V 10V 4.5V 3.7V 3.5V 3.3V 3.0V BOTTOM 2.7V TOP
10
10
2.7V
2.7V
20s PULSE WIDTH T = 25 C
J 1 10 100
1 0.1
1 0.1
20s PULSE WIDTH T = 175 C
J 1 10 100
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
2.5
ID = 56A
TJ = 25 C TJ = 175 C
RDS(on) , Drain-to-Source On Resistance (Normalized)
I D , Drain-to-Source Current (A)
2.0
100
1.5
1.0
10
0.5
1 2.0
V DS = 15V 20s PULSE WIDTH 6.0 7.0 3.0 4.0 5.0 8.0
0.0 -60 -40 -20
VGS = 10V
0 20 40 60 80 100 120 140 160 180
VGS , Gate-to-Source Voltage (V)
TJ , Junction Temperature ( C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
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IRL3103S/LPbF
3000
2500
VGS , Gate-to-Source Voltage (V)
VGS = 0V, f = 1MHz Ciss = Cgs + Cgd , Cds SHORTED Crss = Cgd Coss = Cds + Cgd
15
ID = 34A
12
C, Capacitance (pF)
2000
Ciss C oss
VDS = 24V VDS = 15V
9
1500
6
1000
500
C rss
1 10 100
3
0
0
FOR TEST CIRCUIT SEE FIGURE 13
30 0 10 20 40
VDS , Drain-to-Source Voltage (V)
Q G , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
1000
1000
ISD , Reverse Drain Current (A)
OPERATION IN THIS AREA LIMITED BY R DS(on)
100
TJ = 175 C
ID , Drain-to-Source Current (A)
100
10
100sec 10 1msec Tc = 25C Tj = 175C Single Pulse 1 10 VDS , Drain-toSource Voltage (V) 10msec 100
1
TJ = 25 C
0.1 0.0
V GS = 0 V
0.4 0.8 1.2 1.6 2.0 2.4
1
VSD ,Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
4
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IRL3103S/LPbF
70
VDS
60
RD
VGS RG
D.U.T.
+
I D , Drain Current (A)
50 40 30 20 10 0
-VDD
VGS
Pulse Width 1 s Duty Factor 0.1 %
Fig 10a. Switching Time Test Circuit
VDS 90%
25 50 75 100 125 150 175
TC , Case Temperature
( C)
10% VGS
td(on) tr t d(off) tf
Fig 9. Maximum Drain Current Vs. Case Temperature
Fig 10b. Switching Time Waveforms
10
Thermal Response (Z thJC )
1
D = 0.50 0.20 0.10
0.1
0.05 0.02 0.01
SINGLE PULSE (THERMAL RESPONSE)
0.01 0.00001
Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.01 0.0001 0.001
P DM t1 t2 0.1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRL3103S/LPbF
240
EAS , Single Pulse Avalanche Energy (mJ)
1 5V
200
VD S
L
D R IV E R
TOP BOTTOM ID 14A 24A 34A
160
RG
VV 2 0GS
D .U .T IA S tp 0 .0 1
+ - VD D
A
120
Fig 12a. Unclamped Inductive Test Circuit
V (B R )D SS tp
80
40
0
25
50
75
100
125
150
175
Starting TJ , Junction Temperature ( C)
Fig 12c. Maximum Avalanche Energy Vs. Drain Current
IAS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator Same Type as D.U.T.
50K
QG
12V
.2F .3F
VGS
QGS VG QGD
VGS
3mA
D.U.T.
+ V - DS
Charge
IG
ID
Current Sampling Resistors
Fig 13a. Basic Gate Charge Waveform
Fig 13b. Gate Charge Test Circuit
6
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IRL3103S/LPbF
Peak Diode Recovery dv/dt Test Circuit
D.U.T*
+
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
-
+
RG VGS * dv/dt controlled by RG * ISD controlled by Duty Factor "D" * D.U.T. - Device Under Test
+ VDD
*
Reverse Polarity of D.U.T for P-Channel
Driver Gate Drive P.W. Period D=
P.W. Period
[VGS=10V ] ***
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
[VDD]
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
[ ISD ]
*** VGS = 5.0V for Logic Level and 3V Drive Devices Fig 14. For N-channel HEXFET(R) power MOSFETs
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IRL3103S/LPbF
D2Pak Package Outline
D2Pak Part Marking Information (Lead-Free)
T H IS IS AN IR F 5 30S WIT H L OT COD E 80 24 AS S E MB L E D ON WW 02 , 2 000 IN T H E AS S E MB L Y L IN E "L " N ote: "P " in as s embly line pos ition indicates "L ead-F ree" IN T E R N AT ION AL R E CT IF IE R L OGO AS S E MB L Y L OT COD E P AR T N U MB E R F 5 30 S D AT E COD E YE AR 0 = 2 000 WE E K 02 L IN E L
OR
IN T E R N AT ION AL R E CT IF IE R L OGO AS S E MB L Y L OT COD E P AR T N U MB E R F 530S D AT E COD E P = D E S IGN AT E S L E AD -F R E E P R OD U CT (OP T ION AL ) Y E AR 0 = 2000 WE E K 02 A = AS S E MB L Y S IT E COD E
8
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IRL3103S/LPbF
TO-262 Package Outline
TO-262 Part Marking Information
E XAMP L E : T H IS IS AN IR L 3103L L OT CODE 1789 AS S E MB L E D ON WW 19, 1997 IN T H E AS S E MB L Y L INE "C" Note: "P " in as s embly line pos ition indicates "L ead-F ree" INT E R NAT IONAL R E CT IF IE R L OGO AS S E MB L Y L OT CODE P AR T NU MB E R
DAT E CODE YE AR 7 = 1997 WE E K 19 L INE C
OR
INT E R NAT IONAL R E CT IF IE R L OGO AS S E MB L Y L OT CODE P AR T NU MB E R DAT E CODE P = DE S IGNAT E S L E AD-F R E E P R ODU CT (OP T IONAL ) YE AR 7 = 1997 WE E K 19 A = AS S E MB L Y S IT E CODE
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9
IRL3103S/LPbF
D2Pak Tape & Reel Information
Dimensions are shown in millimeters (inches)
TR R
1 .6 0 (.0 63 ) 1 .5 0 (.0 59 ) 4.10 (.1 6 1 ) 3.90 (.1 5 3 )
1 .6 0 (.0 6 3 ) 1 .5 0 (.0 5 9 )
0 .3 6 8 (.0 1 4 5 ) 0 .3 4 2 (.0 1 3 5 )
F E E D D IR E C TIO N
1 .8 5 (.0 7 3 ) 1 .6 5 (.0 6 5 )
1 1 . 6 0 ( .4 5 7 ) 1 1 . 4 0 ( .4 4 9 )
1 5 .4 2 (. 6 0 9 ) 1 5 .2 2 (. 6 0 1 )
2 4 .3 0 (.9 5 7 ) 2 3 .9 0 (.9 4 1 )
TRL
1 0 . 9 0 ( .4 2 9 ) 1 0 . 7 0 ( .4 2 1 ) 1 .7 5 (. 0 6 9 ) 1 .2 5 (. 0 4 9 ) 1 6 .1 0 ( .6 3 4 ) 1 5 .9 0 ( .6 2 6 ) 4 .7 2 (.1 3 6 ) 4 .5 2 (.1 7 8 )
F E E D D IR E C T IO N
1 3. 50 (.5 3 2 ) 1 2. 80 (.5 0 4 )
2 7 .4 0 (1.0 7 9 ) 2 3 .9 0 (.9 4 1 ) 4
330.00 (14.173) M AX.
6 0.0 0 (2 . 36 2 ) M IN .
NO TE S : 1 . C O M F O R M S T O E IA -4 1 8. 2 . C O N T R O L L IN G D IM E N S IO N : M IL L IM E T E R . 3 . D IM E N S IO N M E A S U R E D @ H U B . 4 . IN C L U D E S F L A N G E D IS T O R T IO N @ O U T E R E D G E .
26 .40 (1.03 9) 24 .40 (.961 ) 3
3 0 .4 0 (1 .1 9 7 ) MAX. 4
Data and specifications subject to change without notice. This product has been designed and qualified for the industrial market. Qualification Standards can be found on IR's Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.04/04
10
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